CSE 3322 Computer Architecture - Spring 2009

 

      ·     Class:: TuTh  3:30-4:50 pm  WH 404

·         Professor: Dr. John Patterson

·         Office Hours: Before and After Class : Other times available by appointment

·          Phone: 817-419-8433

·         E-mail: john.patterson@uta.edu

·         Web Site: crystal.uta.edu/~cse3322

·         GTA: Hun Jung

·         E-mail: hun.jung@mavs.uta.edu

·    Office Hours: 1:30 – 3:00pm in Cribbs 212, on Tu and Th

·         Catalog Description: Hardware and software structures found in modern digital computers. Topics include instruction set architecture, processor 

                                          architecture, memory architecture, input/output architecture, inter-connection schemes, and memory management. Emphasis is

                                           placed on the hardware and software interfaces within a computer system.

·         Prerequisite: CSE 2340 or CSE 2441 DIGITAL LOGIC CIRCUITS

·         Text: Computer Organization and Design, 4th Ed. Revised, D. Patterson and J. Hennessy, Morgan Kaufman Publishers.

·         Grading Policy: 

                             * Exam I: 30%

                             * Exam II: 30%

                             * Exam III: 30%

                             * Homework  10%

 

-         Syllabus

 

      

                                                              Lecture Slides

 

Lecture1

Lecture2

Lecture3

Lecture4

Lecture5

Lecture6

Lecture7

Lecture8

Lecture9

Lecture10

Lecture11

Lecture12

Lecture13

Lecture14

Lecture15

Lecture16A

Lecture17

Lecture18

Lecture19

Lecture20

Lecture21

Lecture22

Lecture23

Lecture24

Lecture25

 

                                                               

                                                               Homework

 

HW1

2.4.1, 2.4.4, 2.6.1,2.10.4,2.10.6 

 Due 2/10/09

 

HW2

2.11.4 a &b, 2.11.5 a & b, 2.11.6 a & b (express in hex 0x)

2.16.6 a &b Give addresses in BNE and j instructions if possible

2.21.4 a & b, 2.26.1 a & b, 2.26.2 a & b

   Due 2/17/09

HW3

1.4.1, 1.4.4, 1.4.6, 1.5.2, 1.5.4, 1.5.5      Due 2/24/09

HW4

3.4.2a, 3.7.2a, 3.8.1a             Due 3/24/09 

HW5

4.2.1b, 4.2.2b, 4.2.3b, 4.9.1a, 4.9.2a, 4.9.3a, 4.11.1a&b, 4.11.2a&b,

4.11.3a&b                               Due 3/31/09

HW6

Due 4/7/09

HW7

5.3.1a,  5.4.1a,  5.4.2a,  5.4.3a,  5.4.4a,  5.4.5a,  5.4.6a    Due 4/28/09

HW8

5.8.4a, 5.11.1a, I/O 1&2                  Due 5/5/09